1. Technical Field
The present disclosure relates to a semiconductor device and method of manufacturing the same, and, more particularly, to a semiconductor device including at least two dies and method of manufacturing the same.
2. Description of the Related Art
Conventionally, a fan-out wafer level packaging structure contains multiple dies, an encapsulant surrounding the dies, and a redistribution layer electrically connecting the dies, where the redistribution layer is arranged on the dies and the encapsulant. However, the die to die connection may include different materials and can involve a heterojunction structure, which may lead to serious warpage problems or even breaking of a trace at a bent portion of the trace due to differences in the respective coefficients of thermal expansion of the different materials. It is desirable to provide a semiconductor device and the process for manufacturing the same that may resolve the issues mentioned above.